Lee Junha

Junha Lee received the B.S. degree in electrical engineering and the M.S. degree from Yonsei University, Seoul, South Korea, in 2012 and 2014, respectively. In 2014, he joined the Semiconductor Memory Division, Samsung Electronics, Hwaseong, South Korea, where he was with the DRAM Design Team. Since 2018 he has been with FLASH design Team. He has developed LPDDR3/4/4X, DDR4, HBM2, F-chip, and seventh-generation V-NAND as an I/O interface designer. He also developed the Toggle DDR5.0 standard. His current research interests include analog, mixed-signal IC design, and high-speed wireline communication circuits.