Muralikrishna Balaga

Muralikrishna Balaga received the B.Tech. degree from Jawaharlal Nehru Technological University, Kakinada, India, and the M.Tech. degree from the National Institute of Technology, Calicut, India, in 2014. During his master, he worked with ST Microelectronics as an Intern in the field of GPIO design and new ESD devices. After his education, he joined Infineon Technologies, Bengaluru, India, where he worked on IO/ESD design field. Since 2015, he has been with nand IO and Datapath Design teams, Western Digital, India. He is currently the Manager with Western Digital. He was actively contributing to IEEE publications. He holds three granted patents and contributed to four IEEE publications in the field of flash memory design. His research interest is in the field of electronic circuit design and device.