Chan-Ho Kim - Flash Memory Design Team, Samsung Electronics

基本信息

Career Trajectory

Bio

Chan Ho Kim was born on October 20, 1972, in Seoul, Korea. He received the B.S. degree in electrical engineering from In-ha University, Korea, in 2000. He joined the Memory Division of Samsung Electronics Corporation, Kiheung, Korea, in 2000, where he has been working on the circuit design of high-density NAND Flash memories. He has been responsible for the full chip layout and routing.

Research Interests

Papers共 8 篇Author StatisticsCo-AuthorSimilar Experts

By YearBy Citation主题筛选期刊级别筛选合作者筛选合作机构筛选

13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5Gb/mm2 Areal Density and a 3.2GB/s High-Speed IO Rate

Wontaeck Jung,Hyunggon Kim,Do-Bin Kim,Tae-Hyun Kim,Nam-Hee Lee, Dongjin Shin, Minyoung Kim, Youngsik Rho, Hun-Jong Lee, Yujin Hyun, Jaeyoung Park, Taekyung Kim,Hwiwon Kim,Gyeongwon Lee,Jisang Lee,Joonsuc Jang,Jungmin Park,Sion Kim,Su Chang Jeon,Suyong Kim,Jung-Ho Song, Min-Seok Kim,Taesung Lee,Byung-Kwan Chun,Tongsung Kim,Young Gyu Lee,Hokil Lee,Soowoong Lee,Hwaseok Lee,Dooho Cho,Sangwan Nam,Yeomyung Kim,Kunyong Yoon, Yoonjae Lee,Sunghoon Kim, Jungseok Hwang, Raehyun Song, Hyunsik Jang,Jae-Ick Son,Hongsoo Jeon,Myunghun Lee, Mookyung Lee,Kisung Kim,Eungsuk Lee,Myeong-Woo Lee,Sungkyu Jo,Chan Ho Kim,Jong Chul Park, Kyunghwa Yun, Soonock Seol,Ji-Ho Cho, Seungjae Lee,Jin-Yub Lee,SungHoi Hur

2024 IEEE International Solid-State Circuits Conference (ISSCC) (2024): 236-237

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A 3.0 Gb/s/pin 4^th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package

Youngmin Jo,Anil Kavala,Tongsung Kim,Byungkwan Chun,Jung-June Park,Taesung Lee,Jungmin Seo,Manjae Yang,Taehyeon Park,Hyunjin Kwon, Cheolhui Lee,Younghoon Son, Junghwan Kwak,Younggyu Lee, Hwan Seok Ku,Daehoon Na, Changyeon Yu,Jonghoon Park,JaeHwan Kim,Hyojin Kwon,Chanho Kim,Moon-Ki Jung,Chanjin Park,Donghyun Seo,Moosung Kim, Seungjae Lee,Jin-Yub Lee,Dongku Kang,Chiweon Yoon,SungHoi Hur

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)pp.1-2, (2023)

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A 3.0 Gb/s/pin 4 th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package

Youngmin Jo,Anil Kavala,Tongsung Kim,Byung-Kwan Chun,Jungjune Park,Taesung Lee,Jungmin Seo,Manjae Yang,Taehyeon Park,Hyunjin Kwon, Cheolhui Lee,Younghoon Son, Junghwan Kwak,Younggyu Lee, Hwan-Seok Ku,Dae-Hoon Na, Changyeon Yu,Jonghoon Park,Jae-Hwan Kim,Hyojin Kwon,Chan-ho Kim,Moon-Ki Jung,Chanjin Park,Donghyun Seo,Moosung Kim, Seungjae Lee,Jin-Yub Lee,Dongku Kang,Chiweon Yoon,SungHoi Hur

VLSI Technology and Circuitspp.1-2, (2023)

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