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13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process
Ikjoon Choi,Seunghwan Hong, Kihyun Kim,Jeong-Sik Hwang, Seunghan Woo,Young-Sang Kim,Cheong-Ryong Cho,Eun-Young Lee, Hun-Jae Lee,Min-Su Jung, Hee-Yun Jung,Ju-Seong Hwang,Junsub Yoon, Wonmook Lim, Hyeong-Jin Yoo, Won-Ki Lee, Jung-Kyun Oh, Dong-Su Lee, Jong-Eun Lee, Jun-Hyung Kim,Young-Kwan Kim,Su-Jin Park,Byung-Kyu Ho,Byong-Wook Na,Hye-In Choi, Chung-Ki Lee, Soo-Jung Lee,Hyunsung Shin, Young-Kyu Lee,Jang-Woo Ryu,Sangwoong Shin, Sungchul Park,Daihyun Lim,Seung-Jun Bae,Young-Soo Sohn,Tae-Young Oh,SangJoon Hwang
2024 IEEE International Solid-State Circuits Conference (ISSCC) (2024): 234-236
引用0浏览0EIWOS引用
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13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5 th -Generation 10nm DRAM Process
IkJoon Choi,Seunghwan Hong, Kihyun Kim,Jeongsik Hwang, Seunghan Woo,Young-Sang Kim,Cheongryong Cho,Eun-Young Lee, Hun-Jae Lee,Min-Su Jung, Hee-Yun Jung,Ju-Seong Hwang,Junsub Yoon, Wonmook Lim, Hyeong-Jin Yoo, Won-Ki Lee, Jung-Kyun Oh, Dong-Su Lee, Jong-Eun Lee, Jun-Hyung Kim,Young-Kwan Kim,Su-Jin Park,Byung-Kyu Ho,Byongwook Na,Hye-In Choi, Chung-Ki Lee, Soo-Jung Lee,Hyunsung Shin, Young-Kyu Lee,Jang-Woo Ryu,Sangwoong Shin, Sungchul Park,Daihyun Lim,Seung-Jun Bae,Young-Soo Sohn,Tae-Young Oh,SangJoon Hwang
IEEE International Solid-State Circuits Conferencepp.234-236, (2024)
引用0浏览0EI引用
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28.7 A 1.1V 6.4Gb/s/pin 24-Gb DDR5 SDRAM with a Highly-Accurate Duty Corrector and NBTI-Tolerant DLL
Daehyun Kwon, Heon Su Jeong,Jaemin Choi,Wijong Kim, Jae Woong Kim,Junsub Yoon,Jungmin Choi,Sanguk Lee, Hyunsub Norbert Rie,Jin-il Lee,Jongbum Lee,Taeseong Jang,JunHyung Kim, Sanghee Kang,Jungbum Shin,Yanggyoon Loh, Chang Yong Lee, Junmyung Woo,Hyeseung Yu,Changhyun Bae,Reum Oh,Young-soo Sohn,Changsik Yoo,Jooyoung Lee
2023 IEEE International Solid-State Circuits Conference (ISSCC)pp.27-29, (2023)
引用3浏览0EIWOS引用
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作者统计

#Papers: 6

#Citation: 7

H-Index: 2

G-Index: 2

Sociability: 4

Diversity: 0

Activity: 0

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