Dual-loop 2-step ZQ calibration for dedicated power supply voltage in LPDDR4 SDRAM
Chang-Kyo Lee,Junha Lee,Kiho Kim, Jin-Seok Heo,Gil-Hoon Cha,Jin-Hyeok Baek,Daesik Moon,Yoon-Joo Eom,Tae-Sung Kim,Hyunyoon Cho,Young Hoon Son, Seonghwan Kim,Jong-Wook Park, Sewon Eom,Si-Hyeong Cho,Young-Ryeol Choi,Seungseob Lee, Kyoung-Soo Ha, Youngseok Kim,Bo-Tak Lim,Dae-Hee Jung, Eungsung Seo,Kyoung-Ho Kim,Yoon-Gyu Song,Youn-Sik Park,Tae-Young Oh,Seung-Jun Bae,Indal Song, Seok-Hun Hyun,Joon-Young Park,Hyuck-Joon Kwon,Young-Soo Sohn,Jung-Hwan Choi,Kwang-Il Park,Seong-Jin Jang 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)（2017）
关键词
DRAM,ZQ calibration,DVFS,Offset calibration
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