High Performance CMOSFET Technology for 45nm Generation

A Oishi,T Komoda,Y Morimasa,T Sanuki, H Yamasaki,M Hamaguchi, K Oouchi,K Matsuo,T Iinuma, T Itoh,Y Takegawa,M Iwai, K Sunouchi, T Noguchi

Digest of Technical Papers 2004 Symposium on VLSI Technology, 2004(2004)

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Key words
CMOS integrated circuits,MOSFET,nanotechnology,45 nm,45nm generation,activation process policy,disposable sidewall spacer,high performance CMOSFET technology,high speed annealing technique,roll-off,source and drain extension junction
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