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Umesh Nawathe (M'12) received the B.S. degree in electronics and telecommunication from the College of Engineering, University of Poona, India, and the M.S. degree in electrical engineering from the University of Michigan, Ann Arbor, MI, USA.
He is a Director of Hardware Engineering at Oracle Corporation, Santa Clara, CA, USA, responsible for Circuit Design on Oracle/SUN's SPARC CMT (concurrent multi-threading) microprocessors. Since joining Oracle/Sun in 2003, he has worked on the Niagara series of CMT microprocessors as well as the M5 and T5 processors that were recently introduced into the marketplace. His areas of interest include low-power and high-performance circuit design, clocking, design methodology, and process technology. Before joining Sun Microsystems, he held senior technical and management positions working at MIPS/Silicon Graphics designing microprocessors based on the MIPS architecture, and at Intel prior to that. He has authored/co-authored and presented papers at the IEEE International Solid State Circuits Conference (ISSCC), International Symposium of Physical Design (ISPD), and IEEE Santa Clara Valley Solid States Circuits Chapter.
Mr. Nawathe was the recipient of the Sun 2007 Chairman's award for Innovation.
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论文共 3 篇作者统计合作学者相似作者
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Jason M. Hart,Hoyeol Cho,Yuefei Ge,Gregory Gruber,Dawei Huang,Changku Hwang,Daisy Jian,Tim Johnson,Georgios K. Konstadinidis,Venkat Krishnaswamy,Lance Kwong,Robert P. Masleid,Rakesh Mehta,Umesh Nawathe,Aparna Ramachandran,Hari Sathianathan,Yongning Sheng,Jinuk Luke Shin,Sebastian Turullols,Zuxu Qin,King C. Yen
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#Papers: 3
#Citation: 91
H-Index: 3
G-Index: 3
Sociability: 3
Diversity: 1
Activity: 0
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