A 3D Stackable DRAM: Capacitor-less Three-Wordline Gate-Controlled Thyristor (GCT) RAM with >40 Μ A Current Sensing Window, >1010 Endurance, and 3-Second Retention at Room Temperature
2022 International Electron Devices Meeting (IEDM)（2022）
关键词
3-WL gate bias,3D stackable configuration,3D stackable DRAM,3D stackable NAND Flash,conventional thyristor RAM,current 40.0 muA,current 60.0 muA,current sensing window,cycling endurance test,DRAM scaling,excellent RAM operation window,GCT RAM,highly layer-stackable 3D DRAM architecture,physical junction doping control,room temperature,standard DRAM,three-wordline gate-controlled thyristor RAM,thyristor-mode latch-up hysteresis effect,time 3.0 s,time 64.0 ms,virtual junction concentration,voltage 2.0 V
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