(Invited) Recent Insights in CMOS Reliability Characterization by the Use of Degradation Maps
2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)（2018）
关键词
modern VLSI devices,tolerable voltage conditions,critical degradation mechanisms,mean degradation,statistical datasets,active degradation mechanisms,FET time-zero metrics,time-dependent variability,CMOS reliability characterization,degradation maps,dedicated on-chip FET arrays,bias space
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