14Nm FDSOI Technology for High Speed and Energy Efficient Applications

O. Weber,E. Josse,F. Andrieu,A. Cros,E. Richard,P. Perreau,E. Baylac,N. Degors,C. Gallon, E. Perrin,S. Chhun,E. Petitprez,S. Delmedico, J. Simon,G. Druais,S. Lasserre,J. Mazurier,N. Guillot, E. Bernard,R. Bianchini,L. Parmigiani, X. Gerard,C. Pribat,O. Gourhant,F. Abbate,C. Gaumer,V. Beugin,P. Gouraud,P. Maury,S. Lagrasta,D. Barge,N. Loubet,R. Beneyton,D. Benoit,S. Zoll,J. -D. Chapon,L. Babaud,M. Bidaud,M. Gregoire,C. Monget,B. Le-Gratiet,P. Brun,M. Mellier,A. Pofelski,L. R. Clement,R. Bingert,S. Puget, J. -F. Kruck, D. Hoguet,P. Scheer,T. Poiroux,J. -P. Manceau,M. Rafik,D. Rideau,M. -A. Jaud,J. Lacord,F. Monsieur,L. Grenouillet,M. Vinet, Q. Liu,B. Doris,M. Celik, S. P. Fetterolf,O. Faynot,M. Haond

2014 Symposium on VLSI Technology (VLSI-Technology) Digest of Technical Papers（2014）

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MOSFET,SRAM chips,oscillators,silicon-on-insulator,FBB,FDSOI technology,Si,drive current,dynamic power reduction,energy efficient applications,forward back bias,full single-port SRAM,gate-to-drain capacitance,high speed applications,high-density bitcell,ring oscillators,size 14 nm,strain-engineered FDSOI transistors

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