A 16 Bit Low-Power-consumption Digital Signal Processor Using a 80 MOPS Redundant Binary MAC
Digest of Technical Papers, Symposium on VLSI Circuits
关键词
CMOS digital integrated circuits,digital arithmetic,digital signal processing chips,multiplying circuits,pipeline arithmetic,0.5 micron,16 bit,40 MIPS,digital signal processor,double-metal-layer CMOS process,fixed point processing,multiply-accumulate operation,operation speed,power consumption,redundant binary MAC,variable pipeline multiply-accumulate unit
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