Circuit and Physical Design Implementation of the Microprocessor Chip for the Zenterprise System

James Warnock,Yiu-Hing Chan,Sean Carey,Huajun Wen,Pat Meaney,Guenter Gerwig,Howard H. Smith,Yuen Chan,John Davis,Paul Bunce,Antonio Pelella, Dan Rodko,Pradip Patel,Thomas Strach,Doug Malone,Frank Malgioglio,Jose Neves,David L. Rude,William Huott

IEEE journal of solid-state circuits（2012）

引用 57|浏览103

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关键词

Cache set predict,chip integration,chip IR drop,chip supply noise,circuit design methodology,clock distribution,clock grid,CMOS digital integrated circuits,design for reliability,design for test,digital circuits,high-frequency CMOS design,microprocessor test,microprocessors,power efficiency,RAIM,RAS,reliability,SRAM,system z,VLSI design,zEnterprise,zEnterprise 196,z196,45 nm SOI

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