Mamoru Nakanishi

Mamoru Nakanishi (M'95) received the B.E. and M.E. degrees in physical electronics from Tokyo Institute of Technology, Tokyo, Japan, in 1986 and 1988, respectively. In 1988, he joined the LSI Laboratories, Nippon Telegraph and Telephone Corporation (NTT), Kanagawa, Japan. He has been engaged in research on highly parallel processing architectures and their applications, especially for image processing and understanding. He is now a Senior Research Engineer, Supervisor, at the NTT Microsystem Integration Laboratories, Atsugi, Kanagawa, Japan. Mr. Nakanishi is a member of the Institute of Electronics, Information and Communication Engineers of Japan (IEICE) and the Information Processing Society of Japan (IPSJ). He received the 1994 Best Paper Award for Young Researcher of IPSJ National Convention and the 2006 IEICE Best Paper Award.