Professor Asenov is a fellow of the Royal Academy of Scotland, an IEEE Fellow and a member of the IEEE Electron Device Society Technology Computer-Aided Design Committee and of the BP Fellowship Committee. He is a co-author of European Nanoelectronics Advisory Council (ENIAC) Strategic Research Agenda (SRA) and acted on behave of EC as and reviewer for more than 15 EC projects and as an evaluator of several FP5, FP6 and FP7 calls. He has been a general chair, co-chair and TPC chair for many international conferences.

RESEARCH INTERESTS
Leader of the Device Modeling Group. Research includes
(i) development of advanced drift diffusion, Monte Carlo and quantum transport simulations tools focused on atomic scale CMOS statistical variability and reliability;
(ii) statistical compact model extraction;
(iii) statistical circuit simulations;
(iv) development of nano-bio simulation tools.