Numerical Analysis of an Ultralow Switching Loss IGBT With an Inner Primary Blocking Junction

To reduce switching loss, an insulated gate bipolar transistor (IGBT) with an inner primary blocking junction (IPBJ) is proposed and investigated. By inserting a P-drift between the N-drift and carrier storage (CS) layer, a primary blocking junction (J(PB)) of the P-drift/N-drift junction and a secondary blocking junction (J(SB)) of the P body/CS layer junction are formed. J(PB) is in the inner of the drift region and supports most of the blocking voltage. This reduces the electric potential in the CS layer and hole density in the hole inversion layer around the trench gate during the turn-on transient. Consequently, its turn-on loss (E-on) and electromagnetic interference (EMI) noise tradeoff relationship is improved. J(PB) is forward-biased by the ON-state excess hole in the P-drift. Thus, no electric field (E-field) builds in J(PB) until the excess hole in the P-drift is swept out by the E-field extending from the reverse biased J(SB) to J(PB). Hence, with almost no excess hole in the P-drift, the E-field in JPB can build fast in both the P-drift and N-drift directions. This reduces the collector voltage rising time, as well as turn-off loss (E-off). Simulation results show that, compared with the state-of-the-art carrier-stored trench-gate bipolar transistor (CSTBT), the proposed 650-V class silicon IPBJ-IGBT reduces Eoff by 79.7% with the same ON-state voltage (V-on) and reduces Eon by 77.9% with the same current overshoot (I-peak). Besides, with its E-field and electric potential distribution optimized, the IPBJ-IGBT also improves its blocking characteristic, short-circuit withstand capability, and unclamped inductive switching performance.