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Tahmoures Shabanian received the M.S. degree in computer engineering from the Electrical and Computer Engineering Department, Utah State University (USU), Logan, UT, USA, in 2018, with a concentration in computer architecture and VLSI.
He is currently a Physical Design Engineer with Marvell Semiconductor, Boise, ID, USA. In the past, he has been involved in embedded systems development, networks, and device security research projects. His current research interests and expertise are mainly in the fields of circuit and architecture design of reliable low-power and high-performance computing units, such as near-threshold voltage operating error-resilient systolic arrays and energy-efficient graphics processing units. He is also interested in VLSI designs and multiprocessor system on a chip (MPSoC) architectures.
Mr. Shabanian ranked first in Iran’s National Islamic Azad University MS Entrance Exam in 2013.
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Proceedings of the International Symposium on Low Power Electronics and Design (2018)
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