The Influence of Delay on PWM and EMI in Parallel Inverter System

In systems with parallel inverters, when there are many inverters, a master-slave control method is commonly used. The control signals generated by the master controller are sent to each slave controller, which then independently controls the corresponding inverter. During this process, varying degrees of delay can occur, leading to differences in the actual power signals. By analyzing the delay of modulating wave and carrier wave, this paper reveals the influence of delay on pulse width modulation (PWM) and electromagnetic interference (EMI). Through theoretical derivation and simulation verification, we found that if there is a delay in the PWM, it will inevitably lead to voltage differences and circulating currents in the parallel-connected system, while also reducing the suppression effect of zero common mode voltage (ZCMV). If carrier synchronization is ensured and the delay between modulation waves meets certain conditions, PWM synchronization can be guaranteed without introducing other issues.