28 nm FD-SOI embedded phase change memory exhibiting near-zero drift at 12 K for cryogenic spiking neural networks (SNNs)

Abstract Seeking to circumvent the bottleneck of conventional computing systems, alternative methods of hardware implementation, whether based on brain-inspired architectures or cryogenic quantum computing systems, invariably suggest the integration of emerging non-volatile memories. However, the lack of maturity, reliability, and cryogenic-compatible memories poses a barrier to the development of such scalable alternative computing solutions. To bridge this gap and outperform traditional CMOS charge-based memories in terms of density and storage, 28 nm Fully Depleted Silicon on Insulator (FD-SOI) substrate-embedded GexSbyTez phase change memories (ePCMs) are characterized down to 12 K. The multi-level resistance programming and its drift over time are investigated. The ePCM can be programmed to achieve and encode 10 different resistance states, at 300 K, 77 K, and 12 K. Interestingly, the drift coefficient is considerably reduced at cryogenic temperatures. Cycle-to-cycle programming variability and resistance drift modelling are carefully used to forecast and evaluate the effect of resistance evolution over time on a fully connected feedforward spiking neural network (SNN) at different temperatures. System-level simulation of a Modified National Institute of Standards and Technology database (MNIST) classification task is performed. The SNN classification accuracy is sustained for up to two years at 77 K and 12 K while a 7–8% drop in accuracy is observed at 300 K. Such results open new horizons for the analogue/multilevel implementation of ePCMs for space and cryogenic applications.