MaPart: an Efficient Multi-FPGA System-Aware Hypergraph Partitioning Framework

Benzheng Li, Shunyang Bi,Hailong You,Zhongdong Qi,Guangxin Guo, Richard Sun,Yuming Zhang

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems（2024）

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关键词

Field programmable gate arrays,Delays,Partitioning algorithms,Time division multiplexing,Routing,Wires,Logic gates,Field programmable gate array (FPGA),hardware emulation,partitioning,timing driven,routing

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