34.7 A 28nm 2.4Mb/mm2 6.9 - 16.3TOPS/mm2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and Refreshing

Yifan He, Shupei Fan, Xuan Li, Luchang Lei,Wenbin Jia,Chen Tang, Yaolei Li, Zongle Huang, Zhike Du,Jinshan Yue,Xueqing Li,Huazhong Yang,Hongyang Jia,Yongpan Liu

2024 IEEE International Solid-State Circuits Conference (ISSCC)(2024)

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摘要
Digital computing-in-memory (DCIM) has showcased its superiority in terms of throughput and accuracy as it scales down toward advanced technology nodes [1] –[3]. However, the inherent computation scheme imposes a limitation on both density and efficiency on the order of conventional digital logic. More specifically, many DCIM macros behave more like compute cores rather than memory modules where the digital logic dominates the macro area. Previous approximate and analog CIM designs [4] –[6] relieve the problem of storage density at the cost of lower SNR or throughput, leading to a challenging trade-off between accuracy, area efficiency, and storage density.
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关键词
Throughput,Energy Efficiency,Density Data,Lookup Table,Load Data,Advanced Design,Improve Energy Efficiency,Combined Weight,Memory Module,Normal Memory,Core Design,Parallel Combination,Sparse Weight
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