Fast Clique Minor Generation in Chimera Qubit Connectivity Graphs

The current generation of D-Wave quantum annealing processor is designed to minimize the energy of an Ising spin configuration whose pairwise interactions lie on the edges of a Chimera graph $${\mathcal {C}}_{M,N,L}$$ . In order to solve an Ising spin problem with arbitrary pairwise interaction structure, the corresponding graph must be minor-embedded into a Chimera graph. We define a combinatorial class of native clique minors in Chimera graphs with vertex images of uniform, near minimal size and provide a polynomial-time algorithm that finds a maximum native clique minor in a given induced subgraph of a Chimera graph. These minors allow improvement over recent work and have immediate practical applications in the field of quantum annealing.