PCB Layout Evaluation of GaN HEMT Power Loop

GaN HEMT has revolutionized power converters by providing higher efficiency, frequency, and power density than silicon MOSFETs. However, parasitic inductance can significantly impact performance in high-frequency workloads. To optimize power converter performance, it is very significant to design the printed circuit boards with low parasitic inductance which has significant relation with power loop inductance. The half-bridge structure is a common feature in many power converters and its power commutation loop layout must be carefully considered. This paper would examine the power loop inductance using typical two-layer structure equivalent conductor model which can be used for calculation and then give typical design for the decoupling of driver loop and power loop. Based on several PCB layouts available, this paper researches a new commutation loop. The GS66508T from GaN System Inc is selected to design each PCB because it is widely used in high power stage converter. Each PCB power loop inductance will be analyzed by Ansys Q3D Extractor.