Modeling and Hardware Implementation of Vector-Matrix Multiplier Based on 32x8 1T1R Memristive Crossbar Array

This report presents the results of designing of a vector-matrix multiplier based on memristive devices. Memristive devices are fabricated in the upper layer of metallization, integrating with CMOS digital circuits in a crossbar architecture with 32 bit lines and 8 word lines. The parameters of all electronic components of the system are calculated using SPICE modeling. A prototype of the system has been developed and its operation is shown in the report. Such a crossbar can be a computational core for a neuroprocessor and can be used for hardware implementation of various architectures of neuromorphic systems.