Design and Hardware-in-the-loop Validation: A Fractional Full Feed-forward Method for Grid Voltage in LCL Grid-connected Inverter Systems

The harmonic disturbance in the background grid is a problem that must be considered in the design of a grid-connected inverter. However, the full feed-forward method cannot completely suppress the harmonic disturbance in theory and is sensitive to noise. To tackle these problems, a fractional full feed-forward method of grid voltage is proposed in this paper. First, the mathematical model of the full feed-forward method is deduced, and the differences with the theoretical solution, which can suppress all harmonics, are analyzed. Then, the parameter equation, the harmonic suppression performance, stability analysis and the implementation process of this method are given. Compared with the full feed-forward method, the proposed method not only further improves the harmonic suppression performance, but also reduces the order of the mathematical model of the differential term in the feed-forward loop. In addition, the proposed method can be used to flexibly design feed-forward coefficients by selecting the order of suppressed harmonics. Finally, the proposed method is validated by a hardware-in-the-loop experiment on a MT real-time control platform NI PXIE-1071.