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A Hardware-Aware Neural Architecture Search Pareto Front Exploration for In-Memory Computing

2022 IEEE 16th International Conference on Solid-State &amp Integrated Circuit Technology (ICSICT)(2022)

Department of Electrical and Electronic Engineering | School of Microelectronics

Cited 0|Views12
Abstract
Traditional neural networks deployed on CPU/GPU architectures have achieved impressive results on various AI tasks. However, the growing model sizes and intensive computation have presented stringent challenges for deployment on edge devices with restrictive compute and storage resources. This paper proposes a one-shot training-evaluation framework to solve the neural architecture search (NAS) problem for in-memory computing, targeting the emerging resistive random-access memory (RRAM) analog AI platform. We test inference accuracy and hardware performance of subnets sampled in different dimensions of a pretrained supernet. Experiments show that the proposed one-shot hardware-aware NAS (HW-NAS) framework can effectively explore the Pareto front considering both accuracy and hardware performance, and generate more optimal models via morphing a standard backbone model.
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CPU-GPU architectures,hardware performance,hardware-aware neural architecture search Pareto front exploration,HW-NAS framework,in-memory computing,inference accuracy,neural architecture search problem,neural networks,one-shot hardware-aware NAS framework,one-shot training-evaluation framework,resistive random-access memory analog AI platform,RRAM,standard backbone model
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要点】:本文提出了一种面向内存计算的硬件感知神经架构搜索方法,通过探索帕累托前沿,实现了在RRAM模拟AI平台上同时考虑准确性和硬件性能的优化模型生成。

方法】:采用一种单次训练-评估框架,针对预训练的超级网络在不同维度上采样的子网进行推断准确性和硬件性能测试。

实验】:实验在RRAM模拟AI平台上进行,使用预训练的超级网络,通过探索不同维度上的子网,证明了所提出的硬件感知NAS(HW-NAS)框架能够有效探索帕累托前沿,并生成更优化的模型。