Active Interposer Technology for Chiplet-Based Advanced 3D System Architectures
Perceval Coudrain,J. Charbonnier,A. Garnier,P. Vivet,Rémi Vélard, A. Vinci,F. Ponthenier,A. Farcy,R. Segaud,P. Chausse,L. Arnaud,D. Lattard,E. Guthmuller,G. Romano,A. Gueugnot,F. Berger, J. Beltritti,T. Mourier,M. Gottardi,S. Minoret,C. Ribière,G. Romero,P.-E. Philip,Y. Exbrayat,D. Scevola, D. Campos,M. Argoud,N. Allouti,R. Eleouet,C. Fuguet Tortolero,C. Aumont,D. Dutoit, C. Legalland,J. Michailos,S. Chéramy,G. Simon 2019 IEEE 69th Electronic Components and Technology Conference (ECTC)（2019）
关键词
3D integration,active interposer,Through silicon via,chiplet,partitioning,Cu pillar,assembly
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