Generating Counterexamples in the form of Unit Tests from Hoare-style Verification Attempts

2022 IEEE/ACM 10th International Conference on Formal Methods in Software Engineering (FormaliSE)(2022)

引用 4|浏览10
暂无评分
摘要
Unit tests that demonstrate why a program is incorrect have many potential uses, including localizing bugs (i.e., showing where code is wrong), improving test suites, and better code synthesis. However, counterexamples produced by failed attempts at Hoare-style verification (e.g., by SMT solvers) are difficult to translate into unit tests. We explain how to generate unit tests from counterexamples generated by an SMT solver and how this process could be embodied in a prototype tool. This process combines static verification techniques and runtime assertion checking.
更多
查看译文
关键词
Formal Methods, SMT Solver, Counterexample, OpenJML
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要