Fabrication Process of MBCFET and its Characteristics

Amarah Zahra,Tarun Chaudhary,Farhana Shahid,Hritwik Todawat,Vaishnawi Singh,Vidhya Sagar,Vineeta Sahani

Proceedings of International Conference on Women Researchers in Electronics and Computing（2021）

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摘要

This paper demonstrates the fabrication process of a novel 3-D multibridge-channel MOSFET, using the conventional CMOS process. It contains a comparative study of I-V characteristics between planer MOSFET and MBCFET. It shows how conventional MBCFET has a disadvantage of poor gate bias control and leakage characteristics and how it can be avoided by using core insulator.

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CMOS Circuits,CMOS Scaling

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