LAPA, a 5 Gb/s Modular Pseudo-Lvds Driver in 180 Nm CMOS with Capacitively Coupled Pre-Emphasis

A pseudo-LVDS driver has been designed in a 180 nm technology for operation up to 5 Gb/s. It contains parallel main driver units based on an H-bridge circuit steering a current on an external load. The number of active units is adjustable, to reduce switching capacitance and static current, and hence power consumption, if a smaller current swing can be tolerated. Pre-emphasis is applied with a capacitively coupled charge-injection circuit. In the nominal condition with a steering current of 4 mA over a 100 $\Omega$ termination resistor, it consumes 30 mW from a 1.8 V supply.