High-Efficiency Stacked Cell CMOS SOI Power Amplifiers for 5G Applications

Design, implementation and characterization of high efficiency CMOS SOI power amplifiers (PAs) based on stacked cell approach and suitable for 5G standard are presented. PA designs based on stacked cells in general, and on stacked triple transistor cells in particular, can deliver both high output powers and high efficiencies from RF to mm-wave frequencies. The PAs designed in this work are implemented in Globalfoundries 45 nm CMOS Silicon on Insulator (SOI) technology. For 26 and 28GHz 5G bands, a PA operating in 24-28 GHz frequency range delivers measured maximum linear power gain of 15.2 dB (16 dB), saturated output power P _SAT of 25.2 dBm (24.8 dBm), -1 dB output compression power P _1dB of 22.5 dBm (17.3 dBm) and a peak power-added efficiency PAE of 20% (15%) at 26 GHz (28 GHz). A second PA, targeted at higher frequencies (42-54 GHz) and designed with two stacked triple transistor cells with combined cell layout to reduce parasitics, provides improvement in PAE but at lower output powers. The design can be easily adopted for 5G bands at 37,39 or 47 GHz.