Investigating Floating-Point Implementations in a Softcore GPU under Radiation-Induced Faults

This work investigates the use of softcore GPUs in SRAM-based FPGAs under emulated radiation-induced transient faults. It explores performing floating-point (FP) operations by using software and hardware implementations in the embedded GPU as a trade-off between area, performance, and reliability. A fault injection campaign is performed by emulating radiation-induced effects in the target FPGA for measuring the architectural vulnerability factor. Evaluated data is then used for calculating the mean work between failure (MWBF) for the different implementations. Experimental results show that although the reduced area has been an important criteria to improve reliability in SRAM-based FPGAs, for all applications, FP calculations performed in hardware increased the MWBF significantly, cases from 1.2 to 18.6 times the software implementation.