A Low-Power Backscatter Modulation System Communicating Across Tens of Meters with Standards-Compliant Wi-Fi Transceivers

This article presents the first integrated circuit designed to enable low-power backscatter communication with commodity Wi-Fi transceivers. The developed chip operates by receiving a series of packets generated from a Wi-Fi access point (AP), which feeds into a low-power energy-detecting wakeup receiver that determines when backscatter communication should commence. Then, the Wi-Fi AP sends an additional packet that is intended to be backscatter modulated. To accomplish this, the antenna receiving the incident Wi-Fi packet is terminated by a dynamically varying collection of complex impedances via a crystal-stabilized multi-phase local oscillator driven by a single-sideband (SSB) mixer, which ultimately performs SSB quadrature phase shift-keying (QPSK) modulation with frequency-translation to a separate Wi-Fi channel for reception by a second Wi-Fi AP. Implemented in 65-nm CMOS, the downlink wake-up receiver consumes 2.8 μW and achieves a sensitivity of -42.5 dBm, which is good enough for >30 m wakeup range, while the backscattering uplink consumes 28 μW and achieves 17 dB of image rejection. Wireless tests reveal a range of 21 m when the developed IC is placed symmetrically between Wi-Fi access points (APs), and a range of >90 m when the developed IC is placed within 1 m of the transmitting Wi-Fi AP.