Gate-Level Validation of Integrated Circuits with Structured-Illumination Read-Out of Embedded Optical Signatures

The integrated circuit (IC) chips are essential components in a variety of computing systems ranging from consumer electronics to high-security military devices. Hence, the authenticity of ICs is crucial. The pervasive nature of ICs and the need for their low-cost production has led to the globalization of IC design and manufacturing process, which has raised various security concerns including; (i) malicious tampering of ICs during fabrication to include Hardware Trojans (HT); and (ii) IC counterfeiting. To detect HTs and IC counterfeiting, we require an examination method to ensure the manufactured IC is consistent with the intended design. Here, we present a robust, rapid, and nondestructive IC authentication technique, which relies on imaging the optical watermarks embedded in predetermined locations in the IC. The watermark is a combination of unique signatures in the optical farfield reflection pattern created by modifying the physical layout of logic gates. These high-contrast optical signatures are enabled by embedding an innovative combination of plasmonic nanoantennas and grating structures directly in the metal-1 layer of the gate design. The uniqueness of logic gates' optical signatures is ensured through different plasmonic nanoantenna dimensions and periodicity of the surrounding gratings. For the rapid read-out of the watermarks, we present a confocal dark-field imaging technique utilizing modulated structured-illumination and lock-in signal acquisition. By combining these innovations in plasmonic nanoantennas and optical imaging, we demonstrate through numerical simulations a 30-fold contrast in polarization dependent reflectivity for each embedded optical signature allowing rapid read-out of watermarks and direct authentication of the IC design.