Energy-efficient Magnetic Approximate Full Adder with Spin-Hall Assistance for Signal Processing Applications

As the technology node shrinks to the nanoscale, several challenges such as high power density have become more critical. One of the most effective methods for addressing these problems is utilizing spintronic devices based on magnetic tunnel junction (MTJ). Furthermore, approximate computing is an emerging paradigm for reducing the power consumption and design complexity in some applications, where the computational error is tolerable. In this paper, a novel non-volatile hybrid MTJ/FinFET-based approximate full adder is presented. The proposed design uses the spin Hall effect (SHE) assisted method for writing data on MTJs, which significantly reduces the power consumption and write energy of the MTJ switching as compared to the conventional STT writing method. The proposed design leads to an effective trade-off between efficiency and quality, as it has a simple and energy-efficient structure, while it provides an acceptable quality in applications like approximate image processing. The circuits are simulated using HSPICE with 14 nm FinFET and SHE perpendicular-anisotropy MTJ models. According to the extensive HSPICE and MATLAB simulations, the proposed approach improves power consumption, delay, power-delay product, and energy-delay product on average by 47%, 53%, 75%, and 86%, while achieving relatively better quality metrics as compared to its state-of-the-art counterparts.