Visual Inertial Odometry at the Edge: A Hardware-Software Co-design Approach for Ultra-low Latency and Power
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)(2019)
Key words
visual inertial odometry,hardware-software co-design approach,VIO accelerator,on-chip shared SRAM,pose estimation accuracy,linear algebra algorithms,power 2.2 mW,frequency 100.0 Hz,size 28.0 nm,frequency 600.0 MHz,memory size 560.0 KByte
AI Read Science
Must-Reading Tree
Example
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined