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Visual Inertial Odometry at the Edge: A Hardware-Software Co-design Approach for Ultra-low Latency and Power

2019 Design, Automation &amp Test in Europe Conference &amp Exhibition (DATE)(2019)

Cited 13|Views101
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Key words
visual inertial odometry,hardware-software co-design approach,VIO accelerator,on-chip shared SRAM,pose estimation accuracy,linear algebra algorithms,power 2.2 mW,frequency 100.0 Hz,size 28.0 nm,frequency 600.0 MHz,memory size 560.0 KByte
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