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23.1 A 7.5gb/s/pin LPDDR5 SDRAM with WCK Clocking and Non-Target ODT for High Speed and with DVFS, Internal Data Copy, and Deep-Sleep Mode for Low Power

2019 IEEE International Solid- State Circuits Conference - (ISSCC)(2019)

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high-resolution displays,mobile devices,lower power consumption,LPDDR4X,on-device artificial intelligence,advanced driver assistance systems,low power schemes,DVFS,internal data-copy function,deep-sleep mode,internal data copy,mobile DRAM,10nm-class process LPDDR5,4G communication,5G communication,dynamic voltage-frequency scaling,write-X,WCK clocking,nontarget ODT,bit rate 7.5 Gbit/s
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