A 7.5gb/S/Pin Lpddr5 Sdram With Wck Clocking And Non-Target Odt For High Speed And With Dvfs, Internal Data Copy, And Deep-Sleep Mode For Low Power
Kyung-Soo Ha,Chang-Kyo Lee,Dongkeon Lee,Daesik Moon,Jin-Hun Jang,Hyong-Ryol Hwang,Hyung-Joon Chi,Junghwan Park,Seungjun Shin,Dukha Park,Sang-Yun Kim,Sukhyun Lim,Kiwon Park,YeonKyu Choi,Young-Hwa Kim,Younghoon Son,Hyunyoon Cho,Byongwook Na,Hyo-Joo Ahn,Seungseob Lee,Seouk-Kyu Choi,Youn-Sik Park,Seok-Hun Hyun,Soobong Chang,Hyuck-Joon Kwon,Jung-Hwan Choi,Tae-Young Oh,Young-Soo Sohn,Kwang-Il Park,Seong-Jin Jang 2019 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)（2019）
AI 理解论文
溯源树
样例
