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ReneGENE-DP: Accelerated Parallel Dynamic Programming for Genome Informatics

2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)(2018)

Cited 4|Views31
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Abstract
Parsing a very long genomic string (human genome is typically 3 billion characters long) abstracts the whole complexity of biocomputing. Approximate String Matching (ASM) is the most eligible computing paradigm that captures the biological complexity of the genome, integrating various sources of biological information into tractable probabilistic models. Though computationally complex, the Dynamic Programming (DP) methodology proves to be very efficient for ASM, in discriminating substantial similarities amongst severe noise in genetic data presented by evolution. Though a significant amount of computations in the DP algorithms are accelerated on multiple platforms, the less complex traceback step is still performed in the host, presenting significant memory and Input/Output bottleneck. With billions of such alignments required to analyse the genomic big data from the Next Generation Sequencing (NGS) Platforms, this bottleneck can severely affect system performance. This paper presents ReneGENE-DP, our implementations of the DP computations on hardware accelerators, with the novelty of realizing traceback in hardware in parallel with the forward scan during analysis, on both FPGA and GPU. The fastest FPGA implementation is around 43.63x better than the fastest GPU implementation of ReneGENE-DP, which in turn, is 380.85x faster than the reference design, which is a GPU based DP algorithm with traceback on host.
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Key words
ReneGENE-DP,genome informatics,human genome,ASM,biological complexity,biological information,genetic data,DP algorithm,genomic big data,DP computations,hardware accelerators,approximate string matching,probabilistic models,accelerated parallel dynamic programming,genomic string,biocomputing,dynamic programming methodology,traceback step,input-output bottleneck,next generation sequencing platforms,NGS platforms,FPGA implementation,GPU
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