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A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET

2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)(2017)

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摘要
Dedicated hardware accelerators enable energy-efficient implementations of radio and imaging basebands. Multistandard, multi-mode radio basebands require an on-the-fly reconfigurable fast Fourier transform (FFT) accelerator that implements many different FFT sizes. An instance of a runtime-reconfigurable 2 n 3 m 5 k FFT accelerator was generated by a custom hardware generator to meet the requirements of common wireless standards (Wi-Fi, LTE). The accelerator is integrated with a RISC-V processor, and the measured 16nm FinFET chip runs up to 940MHz and consumes 0.46 to 22.6mW of power when running FFT benchmarks for Wi-Fi and LTE symbol lengths.
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关键词
hardware generator,runtime reconfigurability,fast Fourier transform,Cooley-Tukey algorithm,prime factor algorithm,Winograd's Fourier transform algorithm,Chisel,LTE,Wi-Fi,RISC-V
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