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A DVS-based Burst Mode with Automatic Entrance Point Control Technique in DC-DC Boost Converter for Wearable Devices and IoT Applications.

2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)(2017)

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摘要
The proposed dynamic voltage scaling (DVS) based burst mode links the DVS technique in a system on a chip (SoC) and the burst mode operation of the DC-DC converter for further efficiency improving. Conventional burst mode has only one entrance transition point (ETP) between the pulse width modulation (PWM) and the burst mode, so the voltage ripple is high at low DVS voltage while the efficiency is low at high DVS voltage. The proposed DVS-based burst mode uses the automatic entrance point control (AEPC) technique to decide multiple ETP values corresponding to the voltage identification (VID) code from the SoC. The quality enhancement technique deliberately adjusts the burst reference voltage to further reduce the output ripple with acceptable loss of efficiency. The tested DC-DC boost converter with the DVS-based burst mode technique is fabricated in 0.18μm CMOS process. Measurement results show that the efficiency is higher than 85% when the output voltage varies from 1.8V to 3.2V (controlled by the DVS) and load current ranges from 0.1mA to 140mA, with peak efficiency 94%.
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关键词
voltage identification code,quality enhancement technique,burst mode technique,automatic entrance point control technique,dynamic voltage scaling based burst mode,entrance transition point,DC-DC boost converter,reference voltage,DVS-based burst mode technique,wearable devices applications,IoT applications,system on a chip,pulse width modulation,CMOS process,voltage 1.8 V to 3.2 V,current 0.1 mA to 140.0 mA
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