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ESD-Induced Circuit Performance Degradation in RFICs.

Microelectronics and reliability(2001)

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摘要
ESD structures have inevitable parasitic impacts on circuit performance. This paper reports results of an investigation into ESD-induced circuit performance degradation in RFICs including clock corruption, reduced slew rate, narrowed bandwidth, and noise generation. Performance degradation of similar to 80%, similar to 30% & similar to5% were observed in clock, Op Amp and LNA circuits studied, which were recovered substantially by using novel compact ESD structures that are critical to reducing ESD-to-circuit influences while maintaining adequate ESD performance. (C) 2001 Elsevier Science Ltd. All rights reserved.
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关键词
RF ESD,ESD Protection,System-Level ESD Test,Integrated Circuits,High-Voltage ESD
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