Hysteresis-Free Nanosecond Pulsed Electrical Characterization of Top-Gated Graphene Transistors

Electron Devices, IEEE Transactions(2014)

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摘要
We measure top-gated graphene field-effect transistors (GFETs) with nanosecond-range pulsed gate and drain voltages. Due to high-κ dielectric or graphene imperfections, the drain current decreases by ~10% over timescales of ~10 μs, consistent with charge trapping mechanisms. The pulsed operation leads to hysteresis-free I-V characteristics that are studied with pulses as short as 75 and 150 ns at the drain and gate, respectively. The pulsed operation enables reliable extraction of GFET intrinsic transconductance and mobility values independent of sweep direction, which are up to a factor of two higher than those obtained from simple dc characterization. We also observe drain-bias-induced charge trapping effects at lateral fields greater than 0.1 V/μm. In addition, using modeling and capacitance-voltage measurements, we extract trap densities up to 1012 cm-2 in the top-gate dielectric (here Al2O3). This study illustrates important timeand field-dependent imperfections of top-gated GFETs with high-κ dielectrics, which must be carefully considered for future developments of this technology.
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field effect transistors,high-k dielectric thin films,semiconductor device measurement,semiconductor device models,c,gfet intrinsic transconductance,capacitance-voltage measurements,charge trapping,drain current,high-κ dielectric,hysteresis-free nanosecond pulsed measurements,pulsed operation,top-gated graphene field effect transistors,trap density,field-effect transistors (fets),graphene,high- $kappa$ dielectric,hysteresis,mobility,nanosecond pulsed measurements,nanosecond pulsed measurements.,logic gates,dielectrics
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