A fully-integrated 18 GHz class-E power amplifier in a 45 nm CMOS SOI technology
Tampa, FL（2014）
摘要
A fully-integrated Class-E power amplifier (PA) operating at 18 GHz is implemented in a standard 45 nm CMOS SOI technology. The PA is designed using differential Cascode topology with cross-coupled capacitors for Gate-Drain capacitance neutralization. The measured single-ended saturated power (PSAT) under a supply voltage of 2 V is 15.9 dBm (differential PSAT of 18.9 dB) and the 1-dB single-ended compression power (P1dB) is 13.3 dBm, with a peak power added efficiency (PAE) of 41.4%. The GateDrain capacitance neutralization technique facilitates the class-E operation and improves the PAE by ~20%.
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关键词
cmos analogue integrated circuits,mmic power amplifiers,integrated circuit design,silicon-on-insulator,cmos soi technology,si,cross-coupled capacitors,differential cascode topology,efficiency 41.4 percent,frequency 18 ghz,fully-integrated class-e pa,fully-integrated class-e power amplifier design,gate-drain capacitance neutralization technique,measured single-ended saturated power,peak power added efficiency,single-ended compression power,size 45 nm,voltage 2 v,cmos,class-e,k-band,rf power amplifier,soi,k band,cmos technology,silicon on insulator,power generation,cmos integrated circuits,capacitors,capacitance
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