Power integrity analysis for core timing models
Electromagnetic Compatibility（2014）
关键词
power aware computing,system-on-chip,AC noise behavior,PDN requirements,STA,core logic timing analysis,jitter information,jitter tracking,on-chip logic timing analysis,power consumption,power distribution network,power integrity analysis,static timing analysis,supply noise induced jitter
AI 理解论文
溯源树
样例
生成溯源树，研究论文发展脉络
Chat Paper
正在生成论文摘要