Hierarchical Test Integration Methodology for 3-D ICs
IEEE design & test(2015)
摘要
In this paper, we propose a hierarchical test integration method for 3-D ICs. The method can handle a die with logic cores and memory cores. In addition to handle the test controlling of a hierarchical 3-D IC, furthermore, it also can support the test controlling of a 3-D IC with multiple towers. For a 3-D IC, the hierarchical test integration method uses two types of 1149.1-based test interfaces ...
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关键词
Three-dimensional displays,Integrated circuits,Registers,Built-in self-test,Discrete Fourier transforms,Switches
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