18Um Pd- Copper Wire Bonding Process Development
Electronic Packaging Technology and High Density Packaging（2012）
摘要
Copper wire has been popular in these years when facing ever-increasing gold prices. Recently, Pd-coated Cu wire is emerging as an alternative to bonding with bare Cu wire to prevent copper oxidation during the bonding and improve manufacturability. Compared to bare copper, Pd copper wire shows robust bonding process, especially offers 2nd bond and better reliability. When it comes to 1st bond, it poses more challenge for its F AB formation process and harder F AB. In this paper, a COMS 65 nm low k device with 2.8um bond pad thickness 47um fine pitch was selected as test vehicle in developing the wire bond process capability on BGA package.FAB formation, bonding capillary, and wire bonding parameters, were selected as critical factors in this study. This paper describes the key EFO parameter optimization of thin 18um Pd copper wire. The distribution of the Pd on the surface was investigated under EFO parameter combination by HPM, and EDX. Capillary feature design was studied to shrink aluminum splash. Capillary with different MTA and chamfer angle were screened to know how these factors affect aluminum splash. KNS ultra Pro-stitch function also studied to improve 2nd bond performance, bare copper as control. Last, the 1st bond parameters were optimized using selected capillary aimed to improve aluminum splash. Critical responses such as Ball size, Ball height, wire pull strength, ball shear strength, and stitch pull strength, cratering, IMC coverage and aluminum splash and remnant were studied to understand effect of Pd copper. DOE (Design of Experiment) and RSM (response surface methodology) was used to optimize the wire bond process. Thermal aging test coupled with wire pull and ball shear test with recording failure mode were studied. The device was subject to Bia-HAST and Temperature cycle and high temperature storage to test reliability.
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关键词
CMOS integrated circuits,X-ray chemical analysis,ageing,ball grid arrays,copper alloys,design of experiments,failure analysis,fine-pitch technology,integrated circuit reliability,lead bonding,low-k dielectric thin films,palladium alloys,reliability,response surface methodology,shear strength,BGA package,Bia-HAST,CMOS low k device,DOE,EDX,EFO parameter optimization,FAB formation process,HPM,KNS ultra prostitch function,Pd-Cu,RSM,aluminum splash,ball height,ball shear strength,ball shear test,ball size,bonding capillary,capillary feature design,chamfer angle,copper oxidation,copper wire bonding process development,design of experiment,fine pitch technology,high temperature storage,higher accelerated temperature and humidity,recording failure mode,response surface methodology,size 18 mum,size 2.8 mum,size 47 mum,size 65 nm,stitch pull strength,temperature cycle,test reliability,test vehicle,thermal aging test,wire pull strength
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