High Level Design Validation: Current Practices and Future Directions.
VLSID '04: Proceedings of the 17th International Conference on VLSI Design(2004)
摘要
This paper describes about the increasing complexity of VLSI design, time to market pressures. The two major paradigms to address the difficulties currently being faced by industry are: (1) the use of higher levels of design abstraction and (2) efficient and seamless design reuse. Current industrial practices and academic research in design verification and validation are also discussed.
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关键词
Current Practices,Future Directions,High Level Design Validation
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