Endurance of Eeproms with On-Chip Error Correction

IEEE transactions on reliability（1987）

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摘要

This paper presents an endurance model for EEPROMs utilizing an on-chip error-correction code (ECC). This is necessary to determine the effect that ECC schemes have upon endurance (and therefore, reliability) of EEPROMs. EEPROM technology is briefly discussed.

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关键词

EPROM,Error correction,Nonvolatile memory,Error correction codes,Voltage,Integrated circuit modeling,Weibull distribution,Manufacturing,Dielectric devices,Semiconductor memory

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