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Reset Noise Reduction in Capacitive Sensors

IEEE Transactions on Circuits and Systems I: Regular Papers (IEEE-TCASI)(2006)

Fairchild Imaging Inc

Cited 51|Views11
Abstract
Reset noise sets a fundamental detection limit on capacitive sensors. Many sensing circuits depend on accumulating charge on a capacitor as the sensing method. Reset noise is the noise that occurs when the capacitor is reset prior to the charge accumulation cycle. Therefore, it is important to understand the factors which determine reset noise, and how this noise may be mitigated. The purpose of this paper is to show how capacitive reset noise can be reduced during the reset cycle. We present and analyze three circuits that implement the basic methods for directly reducing capacitive reset noise. In addition, we present a time-domain technique for analyzing the time-varying statistics of these circuits. This technique makes use of Ito calculus to obtain solutions to the time-varying stochastic differential equations. Theoretical noise calculations and Monte Carlo simulation results are presented for each technique. We show that theory and simulation yield similar results. Finally, we show in the examples that reset noise may be reduced by a factor of 20 or more. We also refer to implemented sensor arrays which achieve these results.
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capacitive sensor,CMOS sensors,imaging,Ito calculus,noise,time-varying stochastic differential equations
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