Seonghwan Cho

Seonghwan Cho (Senior Member, IEEE) received the B.S. degree in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 1995, and the M.S. and Ph.D. degrees in EECS from MIT, Cambridge, MA, USA, in 1997 and 2002, respectively. In 2002, he joined Engim, Inc., Acton, MA, USA, where he was involved in data converters and phased-locked loop (PLL) design for IEEE 802.11abg WLANs. Since 2004, he has been with the School of EE, KAIST, where he is currently a Professor and the Department Head of Semiconductor System Engineering. He was the Research Scientist with Marvell Inc., Santa Clara, CA, USA, from 2011 to 2012, and Google, London, U.K., from 2016 to 2017. His research interests include analog and mixed-signal circuits for high-speed communication, low-power sensors, memory, and machine learning. Prof. Cho has served on the Technical Program Committee for several IEEE conferences, including the International Solid-State Circuits Conference (ISSCC), the Symposium on Very-Large-Scale Integrated (VLSI), and the Asian Solid-State Circuits Conference (ASSCC). He was a co-recipient of the 2009 IEEE Circuits and System Society Guillemin-Cauer Best Paper Award and the 2012 ISSCC Takuo Sugano Award for Outstanding Far-East Paper. He has twice received the Outstanding Lecturer Award from KAIST. He has served on the Technical Program Committee on several IEEE conferences, including ISSCC, Symposium on VLSI, and A-SSCC. He has served as an Associate Editor for IEEE Journal of Solid- State Circuits and IEEE Transactions on Circuits and Systems— I: Regular Paper. He was a Distinguished Lecturer of the IEEE Solid-State Circuits Society.